Designing IC package for today’s products requires balancing packaging choices to meet requirements of customer target cost,
size and performance. Packaging choices range from standard single die packages to System-in-Package (SiP).
Cost, size and performance are influenced by device technologies, Routing topology, substrate materials,
embedded and discrete passives, shielding and encapsulation techniques. Successful design requires not only an understanding
of all of these, but also system and schematic knowledge, substrate design and characterization capabilities, and the skills to
present and make engineering trade-offs. Making the right choices can define the success of a Package / Product
WiWoTech design team has considerable experience in designing semiconductor packages and process lots of new designs from our customer
base every year, we focus on high density IC Package (BGA/LGA/CSP), accumulated a wealth of experience
in PiP/MCM/3D stack/SiP (system in Package)
Our advantage lies in: